100: Nathanael Huffman
Nathanael Huffman joins to talk about the magic of FPGAs, the role they play in domains ranging from medical imaging to data centers, and how software development principles can be applied to logic design. We also discuss how Nathanael and the team at Oxide Computer Company built a new rack-scale computer while working remotely, and what exactly happens when it powers on and boots up.
Nathanael on LinkedIn: https://www.linkedin.com/in/nathanael-huffman-5128024a/
Nathanael on X: https://twitter.com/SyntheticGate
Nathanael on Mastodon: https://hachyderm.io/@SyntheticGate
Show Notes
- Welcome Nathanael (00:01:04)
- Connecting via Oxide and Friends (00:01:10)
- Learning about Circuits and Electronics (00:02:10)
- Electrical Engineering vs. Computer Engineering (00:04:12)
- Attending Purdue University (00:05:21)
- Purdue Engineering Co-op (00:05:41)
- GE Healthcare (00:07:17)
- Theory vs. Practice (00:07:58)
- Field Programmable Gate Arrays (FPGAs) (00:09:23)
- The Magic of FPGAs (00:11:05)
- The Value of FPGAs in Medical Context (00:14:52)
- Computed Tomography (CT) Scanners (00:16:14)
- Filtered Back Projection (FBP) (00:16:48)
- Peripheral Component Interconnect eXtended (PCI-X) (00:17:52)
- Slip Rings (00:19:41)
- 8b/10b Encoding (00:19:54)
- AC Coupling (00:20:05)
- 64b/66b Encoding (00:21:17)
- Soft Core Processors (00:21:56)
- Filtered Back Projection on GPUs (00:23:31)
- TCP Offload with FPGAs (00:24:03)
- FPGA Vendors (00:24:49)
- Altera (00:24:57)
- Team Composition at GE Healthcare (00:26:18)
- Writing Software for Soft Cores (00:27:34)
- FPGA Programming Process (00:28:33)
- Parallel NOR Flash (00:28:57)
- Complex Programmable Logic Device (CPLD) (00:29:02)
- Serial NOR Flash (00:29:38)
- Quad Serial Peripheral Interface (QSPI) (00:29:43)
- Bitstreams (00:30:13)
- Hardware-in-the-Loop Continuous Integration (00:30:45)
- Applying Software Development Principles to Hardware (00:31:51)
- FPGA Build Times (00:34:10)
- Logic Elements (LEs) (00:34:22)
- GitHub Actions (00:35:37)
- Vivado (00:35:45)
- Quartus (00:35:46)
- GitHub Self-Hosted Runners (00:36:33)
- Raspberry Pi (00:36:49)
- Steps in Generating a Bitstream (00:37:26)
- Phases of an FPGA Build (00:38:00)
- Register-Transfer Level (00:38:09)
- Verilog & VHDL (00:38:14)
- Analysis & Elaboration (00:38:23)
- Synthesis (00:39:01)
- Karnaugh Maps (00:39:20)
- Place & Route (00:39:37)
- Configurable Logic Block (CLB) (00:40:17)
- Adaptive Logic Module (ALM) (00:40:19)
- Lookup Table (LUT) (00:40:21)
- Flip Flops (FF) (00:40:22)
- Simulated Annealing (00:40:57)
- Building the Bitstream (00:41:53)
- Timing Constraints (00:41:58)
- Jenkins (00:43:11)
- Incremental Compilation (00:43:34)
- Reproducible Builds (00:43:54)
- Deterministic FPGA Builds (00:44:44)
- Setup and Hold Times (00:45:26)
- Fitter Initial Placement Seed (00:45:38)
- Optimizing Resource Usage and Timing (00:47:14)
- Design Partitioning (00:49:05)
- Reducing Counter Width (00:50:34)
- Vendor IP (00:52:04)
- Serial RapidIO (00:52:35)
- Peripheral Component Interconnect Express (PCIe) (00:54:39)
- FIFOs (00:54:51)
- Dual-Port RAMs (00:55:04)
- Designing for Portability (00:56:05)
- Why Serial RapidIO? (00:57:41)
- SerDes (00:58:02)
- Star Topology (00:58:49)
- Ethernet (00:59:31)
- Clock Data Recovery (CDR) (01:00:53)
- Physical Layer Retransmission (01:03:47)
- User Datagram Protocol (UDP) (01:04:12)
- The Value of Controlling the Whole System (01:05:30)
- Updating CT Scanners in the Field (01:07:38)
- Update Frequency (01:08:27)
- The Value of Working on Complex Systems (01:10:18)
- Oxide Computer Company (01:12:37)
- Bringing the Cloud Native Experience to On-Prem (01:12:58)
- AMD Milan (01:14:13)
- Decision to Join Oxide (01:14:48)
- HackerNews (01:14:50)
- Compensation as a Reflection of Values (01:15:28)
- Oxide Application Process (01:16:48)
- Bryan Cantrill (01:16:58)
- State of the Oxide Rack in 2021 (01:18:00)
- Focus on Ownership (01:19:20)
- Gimlet Server Board (01:20:31)
- Oxide and Friends Hardware Bringup Episodes (01:21:15)
- Working on Hardware in a Remote Company (01:21:25)
- Benchmark Electronics (01:22:47)
- Picking Up Servers in a Cheese Store Parking Lot (01:22:53)
- Is Oxide Reinventing the Wheel? (01:24:11)
- Handling Customer Support Cases (01:25:19)
- Building Big Systems with Remote Hardware Teams (01:26:20)
- What Happens when an Oxide Rack Powers On? (01:26:31)
- Illumos (01:28:26)
- How does the Oxide Computer Boot? (01:28:55)
- Lattice iCE40 FPGA (01:29:29)
- Double Date Rate Memory (DDR) (01:29:44)
- Power Management Bus (PMBus) (01:29:49)
- AMD Platform Security Processor (PSP) (01:30:07)
- DDR Training (01:30:19)
- Dual In-Line Memory Module (DIMM) (01:30:24)
- Pico Host Boot Loader (PHBL) (01:30:42)
- Unified Extensible Firmware Interface (UEFI) (01:31:05)
- Oxide Service Processor (SP) (01:31:31)
- Hubris Embedded OS (01:31:39)
- Oxide Sled Power States (01:31:57)
- Ignition FPGA (01:32:09)
- Fan Control (01:34:50)
- Open Source FPGA Toolchains (01:35:08)
- Open Source vs. Proprietary FPGA Toolchains (01:35:40)
- Reverse Engineering FPGA Chips (01:36:18)
- Yosys (01:37:19)
- ChipScope and Signal Tap (01:37:49)
- Timing Analysis (01:39:40)
- QuickLogic (01:41:50)
- Renesas GreenPAK (01:42:02)
- What’s Next for Oxide? (01:43:34)
- Scaling up Production Lifecycle (01:43:55)
- Next-Gen Server Sled (01:44:32)
- Unifying the Dongles (01:45:35)
Transcript
Coming soon.